1. Field of the Invention
The present invention relates to a method for forming a gate oxide layer of a semiconductor device, and more especially, to a method for forming gate oxide layers formed in a high voltage transistor and a low voltage transistor of a flash memory device, respectively.
2. Discussion of Related Art
The flash memory device is comprised of a cell region with a plurality of cell transistors which store and erase data by tunneling and a peripheral circuit to drive the cell transistor. The peripheral circuit is divided to a low voltage region formed of a low voltage transistor which is applied a low voltage and a high voltage region formed of a high voltage transistor which immunizes against a high voltage for about 20V necessary for tunneling. The high voltage transistor has to comprise of a gate oxide layer as thick as about 300 Å to have immunity against the high voltage.
Therefore, the gate oxide layers for the high voltage transistor are four times as thick as those for the low voltage transistor, of which surfaces have different topologies, thereby transferring the surface topology of the gate oxide layers to a layers which are evaporated later. These topologies make following processes difficult and the device characteristics worse.
Furthermore, there should be made a method to minimize the surface topology between the gate oxide layer for the high voltage transistor and a gate oxide layer for the low voltage transistor.